PROGRAM INFORMATION IN CUSTOM LAYOUT DESIGN

PROGRAM INFORMATION(VLSI Custom Layout Design)

Program Contents

  • CMOS Fabrication
  • Unix Operating System, Shell Programming & VI Editor
  • Stick Plans and Layouts
  • Introduction to Layout Editors
  • Layouts of Basic Gates and Transmission Gates
  • Fingering and Parasitics
  • DRC/LVS
  • Process Antenna Effect
  • SPICE
  • Analog Devices and Matching
  • Analog Layout Guide Lines and Key Points
  • Post Layout RC Extraction and Simulations
  • Training on appropriate tools and languages during labs
  • Transferable skills (Institute Optional)

Program Logistics

  • Full Time, 6 months, 6 days per week
  • Lecture Sessions 3 hours per day
  • Lab & Design Practice 5 hours per day
  • 8:30am-9:00am: Student preparation
  • 9:00am-10:30am: Morning Lecture
  • 10:30am-01:00pm: lab /Assignment (with Tea Break)
  • 01:00pm-01:30pm: Lunch Break
  • 01:30pm-03:00pm: Afternoon Lecture
  • 03:00pm-06:00pm: lab /Assignment (with Tea Break)