Industry Ready Professional Training (IRPT)

in VLSI Design/ Embedded System Design

PROGRAM INFO(VLSI Design-VLSID/Embedded System Design-ESD)

Program Overview

VEDA IIT, in association with JNTUH, offers the Industry Ready Professional Training (IRPT) Program in VLSI Design / Embedded System Design under an MoU, aligning with the New Education Policy.

Key Highlights

Equivalence to B.Tech Curriculum

  • The IRPT program is equivalent to two semesters (IV Year – I & II Semesters) for students of JNTUH Constituent, Affiliated, and Autonomous Colleges.
  • The IV Year B.Tech coursework (40 credits: 20+20) is modified to integrate VEDA IIT courses, enhancing industry readiness.
  • Degree & Credit Transfer: Credits earned at VEDA IIT will be transferred to JNTUH, ensuring students receive their B.Tech degree in their respective specialization (e.g., B.Tech (ECE) for ECE students, B.Tech (CSE) for CSE students).

Fees & Financial Benefits

  • VEDA IIT does not charge any additional tuition fee for the students.
  • Students only need to pay regular tuition and examination fees to their respective colleges.

Training Location & Internship

  • Classes will be conducted at VEDA IIT, Hyderabad.
  • The second semester includes an internship either at VEDA IIT or Consortium company (as per terms and conditions).

Similar Collaborations with other universities

  • VEDA IIT has similar MoUs with few other universities, namely Vignan University, Guntur and Anurag University, Hyderabad, offering equivalent industry-focused programs.

Eligibility Criteria

Who Can Apply?

  • Students completing B.Tech III Year in ECE / EEE / EIE / CSE from:

    o JNTUH, Vignan, or Anurag Universities

    o Constituent, Autonomous & Affiliated Colleges

Selection Process

  • Admission is based on a merit test conducted by VEDA IIT before the commencement of the IV Year B.Tech program.

Academic Requirements

  • No active backlogs
  • Minimum 65% aggregate (till date)

      Course structure

      IV Year I Semester

       

      S. No.

      Type

      Course Code

      Course Title

      1

      T

      V157AA

      		 Advanced Logic Design with Functional Blocks & State Machines

      2.

      E3

      Choose one of the following:

      V157AB

      Unix & Scripting Languages

      V157AH

      Unix & Python Programming

      3.

      E4

      Choose one of the following:

      V157AC

      1. VLSI Design with Verilog

      V157AD

      2. X86 Architecture

      V157AJ

      3. VLSI Design with Verilog-A

      4.

      OE2

      Choose one of the following:

      V157AE

      1. C++ & Verification Methodologies

      V157AF

      2. Physical Design Basics

      V157AG

      3. C++, Data Structures in C

      V157AK

      4. VLSI Analog Design

      V157AL

      5. VLSI Custom Layout Design

      5.

      L

      Choose one of the following Lab:

      V15701

      Unix & Scripting Languages Laboratory

      V15707

      Unix & Python Programming Laboratory

      6.

      EL

      Choose one of the following Lab:

      V15702

      1. VLSI Verilog & System Verilog Laboratory

      V15703

      2. VLSI Physical Design Laboratory

      V15704

      3. C++, Data Structures in C Laboratory

      V15705

      4. X86 Laboratory

      V15708

      5. VLSI Analog Design Laboratory

      V15709

      6. VLSI Custom Layout Design Laboratory

      7.

      PS1

      V15706

      Project Stage – I

       

      IV Year II Semester

       

      S. No.

      Course

      Course Title

      1

      E5

      Choose one of the following:

      V158AA

      1. VLSI Synthesis

      V158AB

      2. Real Time operating system

      V158AL

      3. Scripting for Industry

      2

      E6

      Choose one of the following:

      V158AC

      1. System Verilog Assertions and UVM

      V158AD

      2. Low Power Physical Design & Chip Finishing

      V158AE

      3. Advanced Processor Architecture

      V158AF

      4. Introduction to Web Development

      V158AM

      5. Analog Mixed Signal Design

      V158AN

      6. Advanced IC Layout Techniques

      3

      OE3

      Choose one of the following:

      V158AG

      1. Design for Testability (DFT)

      V158AH

      2. ARM Architecture and Interface Protocols

      V158AJ

      3. Core JAVA

      V158AK

      4. Full Stack

      V158AP

      5. High-Speed CMOS Design

      V158AQ

      6. IC Layout Extraction, Simulation and Verification

      4

      S

      V15801

      Seminar

      5

      PS2

      V15802

      Project Stage -II

       

       

      Program Logistics

        • Full Time, 6 days per week
        • Lecture Sessions 3 hours per day
        • Lab & Design Practice 5 hours per day
        • 8:30am-9:00am: Student preparation
        • 9:00am-10:30am: Morning Lecture
        • 10:30am-01:00pm: lab /Assignment (with Tea Break)
        • 01:00pm-01:30pm: Lunch Break
        • 01:30pm-03:00pm: Afternoon Lecture
        • 03:00pm-06:00pm: lab /Assignment (with Tea Break)

      IRPT in VLSID/ESD