INTEGRATED DUAL DEGREE PROGRAMS (IDP) IN VLSI ENGINEERING AND EMBEDDED SYSTEM DESIGN LEADING TO A JOB
(APPROVED BY JNTUH)

SYLLABUS/TEST PATTERN (VLSI Engineering-VLSI/Embedded System Design-ESD)

Overview:

The focus of the exam is to evaluate the applicant’s knowledge in Digital, Microprocessors, C Programming and aptitude.

Presence of mind, attitude, intuition and ability to apply knowledge will be important for success in the exam.

The written exam comprises of 1 mark, 2 marks, 3 marks/4 marks questions in the following pattern

  • Fill in the blanks
  • Short Answers Questions
  • Problems
Syllabus/Topics for Preliminary Test Marks# Duration
Basic Electronics, Digital Design & Number Systems 20 1 hour
Aptitude 10

For candidates short-listed in Preliminary Test

Syllabus/Topics for Mains Test in VLSI Engineering Marks# Duration
Digital Design & Number Systems 20 2 hours
8086 Microprocessor & 8051 Microcontroller OR Verilog 10
C Programming 20
Aptitude 20
Syllabus/Topics for Mains Test in Embedded System Design Marks# Duration
Digital Design & Number Systems 10 2 hours
8086 Microprocessor & 8051 Microcontroller 20
C Programming 20
Aptitude 20

Applicants need to bring their own pencils, pens, erasers etc. 

Mathematical tables, calculators, mobile phones or any other electronic gadgets will not be allowed into the examination hall

#Marks may vary slightly based on domain.