PROGRAM INFORMATION(Custom Layout Design)
Program Contents
Common
- Number systems
- Combinational and Sequential circuit design at gate and functional block level and their stick diagrams
- Fabrication process
- OS: Unix
- Scripting: PERL/Python, TCL
- Basic device physics: Introduction to MOSFETs, regions of operation, Short channel effects, FDSOI and FinFET device explanations.
- Analog layout concepts: Devices, Matching, layout dependent effects, EM, Antenna effect, Latch-up, Reliability etc.
Domain specific
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Standard cell layout design
- Design of layout for digital cells in 9T, 8T library along with PV checks (DRC, LVS, DFM, PM etc.)
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Analog layout design
- Circuit explanations for analog circuits such as OPAMP, BGR
- Layout constraints and guidelines to design circuits with PV checks (LVS, DRC)
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Memory Layout design
- Circuit explanations for circuits such as level shifter, sense amplifier
- Layout constraints and guidelines to design circuits with PV checks (LVS, DRC)
Program Logistics
- Full Time, 6 months, 6 days per week
- Lecture Sessions 3 hours per day
- Lab & Design Practice 5 hours per day
- 8:30am-9:00am: Student preparation
- 9:00am-10:30am: Morning Lecture
- 10:30am-01:00pm: lab /Assignment (with Tea Break)
- 01:00pm-01:30pm: Lunch Break
- 01:30pm-03:00pm: Afternoon Lecture
- 03:00pm-06:00pm: lab /Assignment (with Tea Break)