Careers in VLSI Design - Analog

Custom Layout Design (CLD)

TEST PATTERN (Custom Layout Design)

Overview:

The focus of the exam is to evaluate the applicant’s Analog Circuit Design aptitude, and ability to apply their knowledge to design complex Analog circuits.

Presence of mind, attitude, intuition and ability to apply knowledge will be important for success in the exam.

The written exam will be of 3 hrs duration comprising of 1 mark,2marks, 3marks/4marks questions in the following pattern

  • Fill in the blanks
  • Short Answers Questions
  • Problems

Examination Syllabus for Main test Analog Design & Circuit Design:

  1. Active (BJT & MOSFET) and Passive Devices
  2. Analysis of Active and Passive circuits
  3. Amplifiers and their frequency response, Filters, Oscillators including op-amps
  4. General Electronics and VLSI Technology
Topics for Preliminary recruitment test Marks# Duration
Basic Electronics, Digital Design & Number Systems 20 1 hours
Aptitude 10
Topics for Main recruitment test Marks# Duration

Aptitude

30

3 hours

Digital Design & Number Systems

10

Analog Design & Circuit Design

60

*Applicants need to bring their own pencils, pens, erasers etc. Question paper cum answer booklet will be provided at the center.
#Marks may vary slightly.