Careers in VLSI Design - Analog

Analog Design (AD)

TEST PATTERN (Analog Design)

The selection and admission process for VEDA IIT programs involves three or four rounds, depending on the number of applications received.

  • Round 1: Main Test – Candidates who received hall ticket will take a written test generally of three-hours duration at the VEDA IIT campus in Hyderabad.
  • Round 2: Technical & Personal Interview – Shortlisted candidates from the main test will undergo  technical and personal interviews at the VEDA IIT campus in Hyderabad.
  • Round 3: Optional based on sponsoring company requirements.

Overview: 

The focus of the exam is to evaluate the applicant’s Analog Circuit Design aptitude, and ability to apply their knowledge to design complex Analog circuits.

Presence of mind, attitude, intuition and ability to apply knowledge will be important for success in the exam.  

The written exam will be comprises of 1 mark, 2 marks, 3 marks/4 marks questions in the following pattern  

  • Fill in the blanks
  • Short Answers Questions
  • Problems
Topics for Main Test Marks# Duration

Aptitude: Area, Average, Boats and Streams, Calendar, Clock, Height and Distance, Logarithm, Logical Reasoning, Numericals and Numbers, Partnership, Percentage, Permutation and Combination, Pipes and Cistern, Probability, Problems on Ages, Problems on H.C.F and L.C.M, Problems on Trains, Profit and Loss, Races and Games, Ratio and Proportion, Square Root and Cube Root, Stocks and Shares, Time and Distance, Time and Work, True Discount, Volume and Surface Area

30

3 hours

Number Systems: Different radices/bases and its conversions, arithmetic operations on different radices, signed numbers signed magnitude numbers, 1’s complement numbers, 2’s complement numbers
Digital Design
Combinational Logic Circuits: Minimization of Boolean functions, Logic gates, Multiplexers and De multiplexers , Decoders ,
Encoders, Priority Encoders, Comparators, Adders, Subtractors
Sequential Logic Circuits: Latches, Flip flops, Counters, Timing waveforms, Mealy & Moore State Diagrams, State tables

20

Basic Electronics (Basic RC Circuits, Diodes and BJTs)

Kirchhoff’s Laws, Node and mesh analysis, superposition, Thevenin’s theorem, Norton’s theorem and maximum power transfer theorem, PN junction diode (clipping, clamping and rectifiers), Zener diode, BJT

20

Analog Design & Circuit Design

Analysis of Active and Passive circuits (BJT and MOSFET amplifiers: biasing, ac coupling, small signal analysis, frequency response, Current mirrors and differential amplifiers, Time and frequency domain analysis of linear circuits: RL, RC and RLC circuits), Opamp circuits: Amplifiers, summers, differentiators, integrators, active filters, Schmitt triggers and oscillators.

30

*Applicants need to bring their own pencils, pens, erasers etc. Question paper cum answer booklet will be provided at the center.

#Marks may vary slightly.